1. Field of the Invention
The present invention relates to a continuous-time filter, and more specifically, to a method of reducing area of a transconductor-capacitor (gm-C) filter.
2. Description of the Prior Art
A transconductor is a circuit that has a voltage as an input and a current as an output. Filters using transconductors and capacitors are often called gm-C filters, where gm represents a transconductance of the transconductor and C represents a capacitance of the capacitor.
Please refer to FIG. 1. FIG. 1 is a block diagram of a gm-C filter unit 10 according to the prior art. The gm-C filter unit 10 comprises a transconductor 20 with a transconductance of gm1, a current summation unit 14, and an integration capacitor C1. A positive input voltage VIP and a negative input voltage VIN are inputted to the gm-C filter unit 10.
The difference between the two input voltages VIP and VIN can be defined as Vin, where Vin=VIPxe2x88x92VIN. Likewise, a positive output voltage VOP and a negative output voltage VON are output from the current summation unit 14. The difference between the two output voltages VOP and VON can be defined as Vout, where Vout=VOPxe2x88x92VON. A ratio between Vout and Vin is directly proportional to the transconductance gm1 of the transconductor 20 and inversely proportional to a capacitance C of the capacitor, as shown in Eqn.1 below.                               Vout          Vin                ∝                  gm1          C                                    (        1        )            
Therefore, if the ratio of Vout to Vin is to be lowered, the transconductance gm1 of the transconductor 20 can be lowered, or the capacitance C of the capacitor C1 can be raised. Unfortunately, it is difficult to give the transconductor 20 a very low transconductance value gm1.
Please refer to FIG. 2A. FIG. 2A is a circuit diagram of the conventional transconductor 20 formed with NMOS transistors according to the prior art. The transconductor 20 contains first and second current sources 22 and 24, which provide current to the transconductor 20 at nodes A and B, respectively. The transconductor 20 also contains a differential pair of transistors N1 and N2. Gates of transistors N1 and N2 are controlled by VIP and VIN, respectively. The source of transistor N1 is connected to current source 22 at node A and the source of transistor N2 is connected to current source 24 at node B. A negative output current IN flows from a drain of transistor N1 at node C and a positive output current IP flows from a drain of transistor N2 at node D. Since transistors N1 and N2 have the same properties, transistors N1 and N2 are formed having identical width-to-length ratios, which can be represented as W/L.
The transconductor 20 further comprises a control transistor N3 connected between the source of transistor N1 at node A and the source of transistor N2 at node B. The control transistor N3 has a gate controlled by a control voltage VCTL. As is well known in the art, parasitic capacitors CP1 and CP2 inherently exist on the transconductor 20, and create an excess positive phase on the negative and positive output currents IN and IP output from the transconductor 20. In addition, an input capacitance is also associated with the transconductor 20, and is a property of all transconductors.
Please refer to FIG. 2B. FIG. 2B is a circuit diagram showing current values in the transconductor 20 of FIG. 2A. Current I flows through the first current source 22 from node A to ground and also travels through the second current source 24 from node B to ground. For simple current analysis, control transistor N3 can be modeled as a resistor with a current I2 flowing from node A to node B. Therefore, a current of I+I2 flows through transistor N1 from node C to node A. On the other hand, a current of II2 flows through transistor N2 from node D to node B. The transconductance of the transconductor 20 will be defined as gmx. An equation for calculating the transconductance gmx is shown in Eqn.2 below.                     gmx        =                              IP            -            IN                                VIP            -            VIN                                              (        2        )            
Therefore, transconductance gmx can be represented as a difference of currents IN and IP divided by xcex94V, as shown in Eqn.3.                     gmx        =                                                            (                                  I                  -                                      I                    ⁢                    2                                                  )                            -                              (                                  I                  +                                      I                    ⁢                    2                                                  )                                                    VIP              -              VIN                                =                      -                                          2                ⁢                                  xe2x80x83                                *                                  I                  ⁢                  2                                                            Δ                ⁢                V                                                                        (        3        )            
Where xcex94V represents VIPxe2x88x92VIN.
Please refer to FIG. 2C. FIG. 2C is a circuit diagram of a conventional transconductor 30 formed with PMOS transistors according to the prior art. The transconductor 30 of FIG. 2C is identical to the transconductor 20 of FIG. 2A and FIG. 2B except that the NMOS transistors N1, N2, and N3 have been replaced with PMOS transistors P1, P2, and P3. In addition, parasitic capacitors CP3 and CP4 and current sources 32 and 34 of the transconductor 30 are all connected to a voltage source VDD. Since the transconductor 30 operates in the same manner as the transconductor 20, additional explanation will not be given for the transconductor 30.
Please refer back to FIG. 1 and Eqn.1. As mentioned above, if the ratio of Vout to Vin is to be lowered, the transconductance gm1 of the transconductor 20 can be lowered, or the capacitance C of the capacitor C1 can be raised. Unfortunately, it is difficult to give the transconductor 20 a very low transconductance value gm1 since the parasitic capacitors CP1 and CP2 inherently exist on the transconductor 20, creating a zero and causing positive excess phase. This excess phase distorts the quality of the gm-C filter unit 10, and is even more serious in high Q or low frequency applications. Therefore, the only alternative is to raise the size of the capacitor C1.
It is therefore a primary objective of the claimed invention to provide a transconductor circuit for use in low frequency applications and having a lower transconductance in order to solve the above-mentioned problems.
According to the claimed invention, a transconductor circuit includes a first current source electrically connected to a first node of the circuit for supplying a first input current to the circuit; a second current source electrically connected to a second node of the circuit for supplying a second input current to the circuit; a first transistor having a first electrode electrically coupled to the first node, a control electrode electrically coupled to a first input voltage, and a second electrode connected to a third node, the third node being used for outputting a first output current from the circuit; a second transistor having a first electrode electrically coupled to the first node, a control electrode electrically coupled to the first input voltage, and a second electrode connected to a fourth node, the fourth node being used for outputting a second output current from the circuit; a third transistor having a first electrode electrically coupled to the second node, a control electrode electrically coupled to a second input voltage, and a second electrode connected to the fourth node; and a fourth transistor having a first electrode electrically coupled to the second node, a control electrode electrically coupled to the second input voltage, and a second electrode connected to the third node.
It is an advantage of the claimed invention that the transconductor circuit has a lower transconductance and does not introduce any additional poles, zeros, input capacitance, or parasitic capacitance into the transconductor circuit. Therefore, the claimed invention transconductor circuit is well suited for use in low frequency applications.